Field of the Invention
The present invention generally relates to electronic circuits and, more specifically, to the forming of a circuit enabling controllably holding electric charges for a time measurement.
Discussion of the Related Art
In many applications, it is desired to have information representative of the time elapsed between two events, be it an accurate or approximate measurement. An example of application relates to the time management of rights of access, especially to media.
The obtaining of this information representative of the elapsed time usually requires a time measurement by an electronic circuit powered, for example, by means of a battery, to avoid losing the information when the circuit is not used.
It would be desirable to have a time measurement which operates even when the electronic measurement circuit is not powered.
International patent application WO-A-03/083769 describes a transactional electronic entity secured by time measurement, in which the time elapsed between two successive transactions is determined by measuring the charge of a capacitive component exhibiting a leakage of its spacer. The component is charged when the circuit is powered and its residual charge, after an interruption of the power supply, is measured when the circuit is powered again. This residual charge is considered as representative of the time elapsed between the two circuit powering times.
The electronic entity is based on a MOS transistor having its gate connected to a first electrode of a capacitive component having its other electrode grounded with the transistor source. The transistor drain is connected to a power supply voltage by means of a current-to-voltage conversion resistor. The voltage measured across the resistor is a function of the drain current in the transistor, and thus of the gate-source voltage thereof, and thus of the voltage across the capacitive component. A time interval is initialized by charging the capacitive component by application of an electric power source on its electrode common with the transistor gate.
The solution provided by this document has several disadvantages.
First, the measurable time range is limited by the possibilities of intervention on the dielectric of the capacitive element.
Then, the charge of the capacitive component generates electric stress on its dielectric so that measurements drift along time.
Further, the provided structure requires forming of a specific component. In certain applications, it would be desirable to associate the time measurement element with a memory to condition the access to the data or programs contained in this memory. The solution of the above-mentioned document is hardly compatible with memory manufacturing steps.
Further, the interpretation of the residual charge in the capacitive component requires calibration steps to generate charge-to-time conversion tables.